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Searched refs:SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h8829 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK 0x00000001L macro
H A Ddce_8_0_sh_mask.h8187 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK 0x1 macro
H A Ddce_11_0_sh_mask.h7141 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK 0x1 macro
H A Ddce_10_0_sh_mask.h7251 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK 0x1 macro
H A Ddce_11_2_sh_mask.h8253 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK 0x1 macro
H A Ddce_12_0_sh_mask.h5160 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1791 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK … macro
H A Ddcn_1_0_sh_mask.h4179 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK … macro
H A Ddcn_3_0_1_sh_mask.h2886 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK … macro
H A Ddcn_2_1_0_sh_mask.h2685 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK … macro
H A Ddcn_3_1_2_sh_mask.h2382 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK … macro
H A Ddcn_3_1_5_sh_mask.h1737 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK … macro
H A Ddcn_3_1_6_sh_mask.h2947 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK … macro
H A Ddcn_3_1_4_sh_mask.h11000 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK … macro
H A Ddcn_3_0_2_sh_mask.h2846 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK … macro
H A Ddcn_2_0_0_sh_mask.h2953 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK … macro
H A Ddcn_3_0_0_sh_mask.h2948 #define SLAVE_COMM_CNTL_REG__SLAVE_COMM_INTERRUPT_MASK … macro