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Searched refs:SHIFT_DIV_FACTOR_SEL (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/clk/sophgo/
H A Dclk-sg2042-clkgen.c68 #define SHIFT_DIV_FACTOR_SEL 3 macro
164 if (!(readl(divider->reg) & BIT(SHIFT_DIV_FACTOR_SEL))) { in sg2042_clk_divider_recalc_rate()
189 if (!(readl(divider->reg) & BIT(SHIFT_DIV_FACTOR_SEL))) { in sg2042_clk_divider_round_rate()
241 val |= BIT(SHIFT_DIV_FACTOR_SEL); in sg2042_clk_divider_set_rate()