Searched refs:SG2042_DIV_HWS_RO (Results 1 – 1 of 1) sorted by relevance
357 #define SG2042_DIV_HWS_RO(_id, _name, _parent, \ macro471 SG2042_DIV_HWS_RO(DIV_CLK_DPLL0_DDR01_0,474 SG2042_DIV_HWS_RO(DIV_CLK_FPLL_DDR01_1,478 SG2042_DIV_HWS_RO(DIV_CLK_DPLL1_DDR23_0,481 SG2042_DIV_HWS_RO(DIV_CLK_FPLL_DDR23_1,