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Searched refs:SEL_PLL_PACK (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/clk/renesas/
H A Dr9a09g011-cpg.c30 #define SEL_B SEL_PLL_PACK(0x214, 0, 1)
31 #define SEL_CSI0 SEL_PLL_PACK(0x330, 0, 1)
32 #define SEL_CSI4 SEL_PLL_PACK(0x330, 4, 1)
33 #define SEL_D SEL_PLL_PACK(0x214, 1, 1)
34 #define SEL_E SEL_PLL_PACK(0x214, 2, 1)
35 #define SEL_SDI SEL_PLL_PACK(0x300, 0, 1)
36 #define SEL_W0 SEL_PLL_PACK(0x32C, 0, 1)
H A Drzg2l-cpg.h75 #define SEL_PLL_PACK(offset, bitpos, size) \ macro
78 #define SEL_PLL3_3 SEL_PLL_PACK(CPG_PL3_SSEL, 8, 1)
79 #define SEL_PLL5_4 SEL_PLL_PACK(CPG_OTHERFUNC1_REG, 0, 1)
80 #define SEL_PLL6_2 SEL_PLL_PACK(CPG_PL6_ETH_SSEL, 0, 1)
81 #define SEL_GPU2 SEL_PLL_PACK(CPG_PL6_SSEL, 12, 1)
H A Dr9a07g043-cpg.c21 #define SEL_SDHI0 SEL_PLL_PACK(CPG_PL2SDHI_DSEL, 0, 2)
22 #define SEL_SDHI1 SEL_PLL_PACK(CPG_PL2SDHI_DSEL, 4, 2)
25 #define SEL_SDHI0_STS SEL_PLL_PACK(CPG_CLKSTATUS, 28, 1)
26 #define SEL_SDHI1_STS SEL_PLL_PACK(CPG_CLKSTATUS, 29, 1)
H A Dr9a07g044-cpg.c22 #define SEL_SDHI0 SEL_PLL_PACK(CPG_PL2SDHI_DSEL, 0, 2)
23 #define SEL_SDHI1 SEL_PLL_PACK(CPG_PL2SDHI_DSEL, 4, 2)
26 #define SEL_SDHI0_STS SEL_PLL_PACK(CPG_CLKSTATUS, 28, 1)
27 #define SEL_SDHI1_STS SEL_PLL_PACK(CPG_CLKSTATUS, 29, 1)