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Searched refs:SDMA1_STATUS_REG__RB_MC_RREQ_IDLE_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h525 #define SDMA1_STATUS_REG__RB_MC_RREQ_IDLE_MASK 0x00020000L macro
H A Dsdma1_4_2_sh_mask.h523 #define SDMA1_STATUS_REG__RB_MC_RREQ_IDLE_MASK … macro
H A Dsdma1_4_2_2_sh_mask.h527 #define SDMA1_STATUS_REG__RB_MC_RREQ_IDLE_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1459 #define SDMA1_STATUS_REG__RB_MC_RREQ_IDLE_MASK 0x20000 macro
H A Doss_2_4_sh_mask.h1621 #define SDMA1_STATUS_REG__RB_MC_RREQ_IDLE_MASK 0x20000 macro
H A Doss_3_0_1_sh_mask.h2139 #define SDMA1_STATUS_REG__RB_MC_RREQ_IDLE_MASK 0x20000 macro
H A Doss_3_0_sh_mask.h2443 #define SDMA1_STATUS_REG__RB_MC_RREQ_IDLE_MASK 0x20000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h3030 #define SDMA1_STATUS_REG__RB_MC_RREQ_IDLE_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2736 #define SDMA1_STATUS_REG__RB_MC_RREQ_IDLE_MASK … macro
H A Dgc_12_0_0_sh_mask.h3095 #define SDMA1_STATUS_REG__RB_MC_RREQ_IDLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h3005 #define SDMA1_STATUS_REG__RB_MC_RREQ_IDLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h2807 #define SDMA1_STATUS_REG__RB_MC_RREQ_IDLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h3114 #define SDMA1_STATUS_REG__RB_MC_RREQ_IDLE_MASK … macro