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Searched refs:SDMA1_STATUS_REG__IDLE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h479 #define SDMA1_STATUS_REG__IDLE__SHIFT 0x0 macro
H A Dsdma1_4_2_sh_mask.h477 #define SDMA1_STATUS_REG__IDLE__SHIFT … macro
H A Dsdma1_4_2_2_sh_mask.h481 #define SDMA1_STATUS_REG__IDLE__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1428 #define SDMA1_STATUS_REG__IDLE__SHIFT 0x0 macro
H A Doss_2_4_sh_mask.h1588 #define SDMA1_STATUS_REG__IDLE__SHIFT 0x0 macro
H A Doss_3_0_1_sh_mask.h2106 #define SDMA1_STATUS_REG__IDLE__SHIFT 0x0 macro
H A Doss_3_0_sh_mask.h2410 #define SDMA1_STATUS_REG__IDLE__SHIFT 0x0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h2984 #define SDMA1_STATUS_REG__IDLE__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2690 #define SDMA1_STATUS_REG__IDLE__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h3051 #define SDMA1_STATUS_REG__IDLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h2959 #define SDMA1_STATUS_REG__IDLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h2759 #define SDMA1_STATUS_REG__IDLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h3068 #define SDMA1_STATUS_REG__IDLE__SHIFT 0x0 macro
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