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Searched refs:SDMA1_STATUS2_REG__CMD_OP__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h664 #define SDMA1_STATUS2_REG__CMD_OP__SHIFT 0x10 macro
H A Dsdma1_4_2_sh_mask.h678 #define SDMA1_STATUS2_REG__CMD_OP__SHIFT … macro
H A Dsdma1_4_2_2_sh_mask.h682 #define SDMA1_STATUS2_REG__CMD_OP__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1728 #define SDMA1_STATUS2_REG__CMD_OP__SHIFT 0x10 macro
H A Doss_3_0_1_sh_mask.h2254 #define SDMA1_STATUS2_REG__CMD_OP__SHIFT 0x10 macro
H A Doss_3_0_sh_mask.h2552 #define SDMA1_STATUS2_REG__CMD_OP__SHIFT 0x10 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h3187 #define SDMA1_STATUS2_REG__CMD_OP__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2902 #define SDMA1_STATUS2_REG__CMD_OP__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h3227 #define SDMA1_STATUS2_REG__CMD_OP__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h3150 #define SDMA1_STATUS2_REG__CMD_OP__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h2983 #define SDMA1_STATUS2_REG__CMD_OP__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h3259 #define SDMA1_STATUS2_REG__CMD_OP__SHIFT … macro