Home
last modified time | relevance | path

Searched refs:SDMA1_STATUS1_REG__CE_DST_IDLE_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h558 #define SDMA1_STATUS1_REG__CE_DST_IDLE_MASK 0x00000040L macro
H A Dsdma1_4_2_sh_mask.h556 #define SDMA1_STATUS1_REG__CE_DST_IDLE_MASK … macro
H A Dsdma1_4_2_2_sh_mask.h560 #define SDMA1_STATUS1_REG__CE_DST_IDLE_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1493 #define SDMA1_STATUS1_REG__CE_DST_IDLE_MASK 0x40 macro
H A Doss_2_4_sh_mask.h1657 #define SDMA1_STATUS1_REG__CE_DST_IDLE_MASK 0x40 macro
H A Doss_3_0_1_sh_mask.h2175 #define SDMA1_STATUS1_REG__CE_DST_IDLE_MASK 0x40 macro
H A Doss_3_0_sh_mask.h2479 #define SDMA1_STATUS1_REG__CE_DST_IDLE_MASK 0x40 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h3063 #define SDMA1_STATUS1_REG__CE_DST_IDLE_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2772 #define SDMA1_STATUS1_REG__CE_DST_IDLE_MASK … macro
H A Dgc_12_0_0_sh_mask.h3135 #define SDMA1_STATUS1_REG__CE_DST_IDLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h3038 #define SDMA1_STATUS1_REG__CE_DST_IDLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h2848 #define SDMA1_STATUS1_REG__CE_DST_IDLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h3147 #define SDMA1_STATUS1_REG__CE_DST_IDLE_MASK … macro