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Searched refs:SDMA1_RLC0_CONTEXT_STATUS__CTXSW_ABLE__SHIFT (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1521 #define SDMA1_RLC0_CONTEXT_STATUS__CTXSW_ABLE__SHIFT 0x7 macro
H A Dsdma1_4_2_sh_mask.h1529 #define SDMA1_RLC0_CONTEXT_STATUS__CTXSW_ABLE__SHIFT … macro
H A Dsdma1_4_2_2_sh_mask.h1537 #define SDMA1_RLC0_CONTEXT_STATUS__CTXSW_ABLE__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1706 #define SDMA1_RLC0_CONTEXT_STATUS__CTXSW_ABLE__SHIFT 0x7 macro
H A Doss_2_4_sh_mask.h1908 #define SDMA1_RLC0_CONTEXT_STATUS__CTXSW_ABLE__SHIFT 0x7 macro
H A Doss_3_0_1_sh_mask.h2854 #define SDMA1_RLC0_CONTEXT_STATUS__CTXSW_ABLE__SHIFT 0x7 macro
H A Doss_3_0_sh_mask.h2968 #define SDMA1_RLC0_CONTEXT_STATUS__CTXSW_ABLE__SHIFT 0x7 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h4139 #define SDMA1_RLC0_CONTEXT_STATUS__CTXSW_ABLE__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h4085 #define SDMA1_RLC0_CONTEXT_STATUS__CTXSW_ABLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h4258 #define SDMA1_RLC0_CONTEXT_STATUS__CTXSW_ABLE__SHIFT … macro