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Searched refs:SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h605 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro
H A Dsdma1_4_2_sh_mask.h605 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT … macro
H A Dsdma1_4_2_2_sh_mask.h609 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1544 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro
H A Doss_2_4_sh_mask.h1714 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro
H A Doss_3_0_1_sh_mask.h2234 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro
H A Doss_3_0_sh_mask.h2538 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2843 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h3211 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h3091 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h2923 #define SDMA1_EDC_CONFIG__ECC_INT_ENABLE__SHIFT … macro