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Searched refs:SDMA1_BASE__INST0_SEG3 (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/
H A Dvega20_ip_offset.h715 #define SDMA1_BASE__INST0_SEG3 0 macro
H A Dsienna_cichlid_ip_offset.h917 #define SDMA1_BASE__INST0_SEG3 0x02402C00 macro
H A Dvega10_ip_offset.h1026 #define SDMA1_BASE__INST0_SEG3 0 macro
H A Darct_ip_offset.h968 #define SDMA1_BASE__INST0_SEG3 0 macro
H A Daldebaran_ip_offset.h1251 #define SDMA1_BASE__INST0_SEG3 0 macro