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Searched refs:SDMA1_BASE__INST0_SEG0 (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/
H A Dvega20_ip_offset.h712 #define SDMA1_BASE__INST0_SEG0 0x00001860 macro
H A Dsienna_cichlid_ip_offset.h914 #define SDMA1_BASE__INST0_SEG0 0x00001260 macro
H A Dvega10_ip_offset.h1023 #define SDMA1_BASE__INST0_SEG0 0x00001460 macro
H A Darct_ip_offset.h965 #define SDMA1_BASE__INST0_SEG0 0x00001860 macro
H A Daldebaran_ip_offset.h1248 #define SDMA1_BASE__INST0_SEG0 0x00001860 macro