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Searched refs:SDMA0_STATUS_REG__IDLE_MASK (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h513 #define SDMA0_STATUS_REG__IDLE_MASK … macro
H A Dsdma0_4_0_sh_mask.h514 #define SDMA0_STATUS_REG__IDLE_MASK 0x00000001L macro
H A Dsdma0_4_2_sh_mask.h514 #define SDMA0_STATUS_REG__IDLE_MASK … macro
H A Dsdma0_4_2_2_sh_mask.h520 #define SDMA0_STATUS_REG__IDLE_MASK … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v7_0.c1454 if (!(tmp & SDMA0_STATUS_REG__IDLE_MASK)) in sdma_v7_0_is_idle()
1471 if (sdma0 & sdma1 & SDMA0_STATUS_REG__IDLE_MASK) in sdma_v7_0_wait_for_idle()
H A Dsdma_v6_0.c1500 if (!(tmp & SDMA0_STATUS_REG__IDLE_MASK)) in sdma_v6_0_is_idle()
1517 if (sdma0 & sdma1 & SDMA0_STATUS_REG__IDLE_MASK) in sdma_v6_0_wait_for_idle()
H A Dsdma_v5_0.c1512 if (!(tmp & SDMA0_STATUS_REG__IDLE_MASK)) in sdma_v5_0_is_idle()
1529 if (sdma0 & sdma1 & SDMA0_STATUS_REG__IDLE_MASK) in sdma_v5_0_wait_for_idle()
H A Dsdma_v5_2.c1428 if (!(tmp & SDMA0_STATUS_REG__IDLE_MASK)) in sdma_v5_2_is_idle()
1447 if (sdma0 & sdma1 & sdma2 & sdma3 & SDMA0_STATUS_REG__IDLE_MASK) in sdma_v5_2_wait_for_idle()
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h909 #define SDMA0_STATUS_REG__IDLE_MASK 0x1 macro
H A Doss_2_4_sh_mask.h989 #define SDMA0_STATUS_REG__IDLE_MASK 0x1 macro
H A Doss_3_0_1_sh_mask.h1007 #define SDMA0_STATUS_REG__IDLE_MASK 0x1 macro
H A Doss_3_0_sh_mask.h1513 #define SDMA0_STATUS_REG__IDLE_MASK 0x1 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h205 #define SDMA0_STATUS_REG__IDLE_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_sh_mask.h201 #define SDMA0_STATUS_REG__IDLE_MASK … macro
H A Dgc_11_0_0_sh_mask.h190 #define SDMA0_STATUS_REG__IDLE_MASK … macro
H A Dgc_12_0_0_sh_mask.h169 #define SDMA0_STATUS_REG__IDLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h222 #define SDMA0_STATUS_REG__IDLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h198 #define SDMA0_STATUS_REG__IDLE_MASK … macro