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Searched refs:SDMA0_STATUS2_REG__ID__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h703 #define SDMA0_STATUS2_REG__ID__SHIFT macro
H A Dsdma0_4_0_sh_mask.h704 #define SDMA0_STATUS2_REG__ID__SHIFT 0x0 macro
H A Dsdma0_4_2_sh_mask.h720 #define SDMA0_STATUS2_REG__ID__SHIFT macro
H A Dsdma0_4_2_2_sh_mask.h726 #define SDMA0_STATUS2_REG__ID__SHIFT macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1164 #define SDMA0_STATUS2_REG__ID__SHIFT 0x0 macro
H A Doss_3_0_1_sh_mask.h1190 #define SDMA0_STATUS2_REG__ID__SHIFT 0x0 macro
H A Doss_3_0_sh_mask.h1688 #define SDMA0_STATUS2_REG__ID__SHIFT 0x0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h413 #define SDMA0_STATUS2_REG__ID__SHIFT macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_sh_mask.h382 #define SDMA0_STATUS2_REG__ID__SHIFT macro
H A Dgc_11_0_0_sh_mask.h371 #define SDMA0_STATUS2_REG__ID__SHIFT macro
H A Dgc_12_0_0_sh_mask.h316 #define SDMA0_STATUS2_REG__ID__SHIFT macro
H A Dgc_10_1_0_sh_mask.h418 #define SDMA0_STATUS2_REG__ID__SHIFT macro
H A Dgc_11_0_3_sh_mask.h389 #define SDMA0_STATUS2_REG__ID__SHIFT macro
H A Dgc_10_3_0_sh_mask.h383 #define SDMA0_STATUS2_REG__ID__SHIFT macro