Home
last modified time | relevance | path

Searched refs:SDMA0_STATUS1_REG__CE_WR_IDLE_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h558 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK … macro
H A Dsdma0_4_0_sh_mask.h559 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK 0x00000002L macro
H A Dsdma0_4_2_sh_mask.h559 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK … macro
H A Dsdma0_4_2_2_sh_mask.h565 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h965 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK 0x2 macro
H A Doss_2_4_sh_mask.h1049 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK 0x2 macro
H A Doss_3_0_1_sh_mask.h1067 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK 0x2 macro
H A Doss_3_0_sh_mask.h1573 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK 0x2 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h250 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_sh_mask.h249 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK … macro
H A Dgc_11_0_0_sh_mask.h238 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK … macro
H A Dgc_12_0_0_sh_mask.h221 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h267 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h251 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h268 #define SDMA0_STATUS1_REG__CE_WR_IDLE_MASK … macro