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Searched refs:SDMA0_PHASE0_QUANTUM__PREFER__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h597 #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h598 #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT 0x1e macro
H A Dsdma0_4_2_sh_mask.h600 #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT … macro
H A Dsdma0_4_2_2_sh_mask.h606 #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1016 #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT 0x1e macro
H A Doss_2_4_sh_mask.h1106 #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT 0x1e macro
H A Doss_3_0_1_sh_mask.h1126 #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT 0x1e macro
H A Doss_3_0_sh_mask.h1632 #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT 0x1e macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h293 #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h312 #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h313 #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT … macro