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Searched refs:SCLK_SPDIF (Results 1 – 16 of 16) sorted by relevance

/linux/include/dt-bindings/clock/
H A Drk3036-cru.h27 #define SCLK_SPDIF 83 macro
H A Dexynos7-clk.h119 #define SCLK_SPDIF 27 macro
H A Ds5pv210.h187 #define SCLK_SPDIF 165 macro
H A Drk3128-cru.h30 #define SCLK_SPDIF 83 macro
H A Drk3228-cru.h30 #define SCLK_SPDIF 83 macro
H A Drk3328-cru.h35 #define SCLK_SPDIF 46 macro
H A Drk3288-cru.h38 #define SCLK_SPDIF 83 macro
/linux/drivers/clk/rockchip/
H A Dclk-rk3036.c167 MUX(SCLK_SPDIF, "sclk_spdif", mux_spdif_p, 0,
H A Dclk-rk3128.c182 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3228.c196 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3328.c249 MUX(SCLK_SPDIF, "sclk_spdif", mux_spdif_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3288.c382 GATE(SCLK_SPDIF, "sclk_spdif", "spdif_mux", CLK_SET_RATE_PARENT,
/linux/arch/arm/boot/dts/rockchip/
H A Drk3188.dtsi184 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
H A Drk322x.dtsi166 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>;
H A Drk3128.dtsi448 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3328.dtsi282 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>;