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Searched refs:SCLK_OTGPHY0 (Results 1 – 17 of 17) sorted by relevance

/linux/include/dt-bindings/clock/
H A Drk3036-cru.h32 #define SCLK_OTGPHY0 93 macro
H A Drk3188-cru-common.h37 #define SCLK_OTGPHY0 81 macro
H A Drk3128-cru.h56 #define SCLK_OTGPHY0 142 macro
H A Drk3228-cru.h65 #define SCLK_OTGPHY0 142 macro
H A Drk3368-cru.h44 #define SCLK_OTGPHY0 93 macro
H A Drk3288-cru.h48 #define SCLK_OTGPHY0 93 macro
/linux/drivers/clk/rockchip/
H A Dclk-rk3036.c329 GATE(SCLK_OTGPHY0, "sclk_otgphy0", "xin12m", CLK_IGNORE_UNUSED,
H A Dclk-rk3128.c385 GATE(SCLK_OTGPHY0, "sclk_otgphy0", "xin12m", 0,
H A Dclk-rk3228.c461 GATE(SCLK_OTGPHY0, "sclk_otgphy0", "xin24m", 0,
H A Dclk-rk3188.c349 GATE(SCLK_OTGPHY0, "sclk_otgphy0", "xin24m", CLK_IGNORE_UNUSED,
H A Dclk-rk3368.c565 GATE(SCLK_OTGPHY0, "sclk_otgphy0", "xin24m", CLK_IGNORE_UNUSED,
H A Dclk-rk3288.c558 GATE(SCLK_OTGPHY0, "sclk_otgphy0", "xin24m", CLK_IGNORE_UNUSED,
/linux/arch/arm/boot/dts/rockchip/
H A Drk3188.dtsi657 clocks = <&cru SCLK_OTGPHY0>;
H A Drk3066a.dtsi714 clocks = <&cru SCLK_OTGPHY0>;
H A Drk322x.dtsi259 clocks = <&cru SCLK_OTGPHY0>;
H A Drk3128.dtsi557 clocks = <&cru SCLK_OTGPHY0>;
H A Drk3288.dtsi917 clocks = <&cru SCLK_OTGPHY0>;