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Searched refs:SCLK (Results 1 – 16 of 16) sorted by relevance

/linux/Documentation/iio/
H A Dad4000.rst62 +--------------------| SCLK |
87 +--------------------| SCLK |
104 +--------------------| SCLK |
130 +--------------------| SCLK |
H A Dad4695.rst44 | SCLK |<--------| SCLK |
/linux/drivers/spi/
H A Dspi-lm70llp.c66 #define SCLK 0x40 macro
116 parport_write_data(pp->port, data | SCLK); in clkHigh()
123 parport_write_data(pp->port, data & ~SCLK); in clkLow()
/linux/Documentation/devicetree/bindings/sound/
H A Dcs35l34.txt45 SCLK. Otherwise, data is on the falling edge of SCLK.
/linux/include/dt-bindings/clock/
H A Dmicrochip,pic32-clock.h18 #define SCLK 7 macro
/linux/Documentation/devicetree/bindings/spi/
H A Dspi_oc_tiny.txt9 the input clock to SCLK.
/linux/Documentation/hwmon/
H A Dlm70.rst45 the driver accesses the LM70 using SPI communication: 16 SCLK cycles
/linux/drivers/clk/microchip/
H A Dclk-pic32mzda.c210 clks[SCLK] = pic32_sys_clk_register(&sys_mux_clk, core); in pic32mzda_clk_probe()
/linux/Documentation/spi/
H A Dspi-lm70llp.rst45 D6 8 --> SCLK 3
H A Dspi-summary.rst183 All spiB.* devices share one physical SPI bus segment, with SCLK,
631 SCLK ___ ___ ___ ___ ___ ___ ___ ___
670 SCLK ___ ___ ___ ___ ___ ___ ___ ___
/linux/Documentation/input/devices/
H A Damijoy.rst102 the rising edge of SCLK. MLD output is used to parallel load
/linux/drivers/scsi/sym53c8xx_2/
H A Dsym_defs.h268 #define SCLK 0x80 /* Use the PCI clock as SCSI clock */ macro
H A Dsym_hipd.c446 OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
/linux/arch/arm/boot/dts/marvell/
H A Darmada-385-turris-omnia.dts587 /* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
/linux/drivers/scsi/
H A Dncr53c8xx.h791 #define SCLK 0x80 /* Use the PCI clock as SCSI clock */ macro
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Daldebaran_ppt.c159 CLK_MAP(SCLK, PPCLK_GFXCLK),