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Searched refs:RequiredDPPCLK (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1751 context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel][context->bw_ctx.dml.vba.maxMpcComb][pipe_idx]; in dcn20_calculate_wm()
1760 …context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel][context->bw_ctx.dml.vba.maxMpcComb][pipe_split_from… in dcn20_calculate_wm()
2151 v->RequiredDPPCLK[vlevel][max_mpc_comb][pipe_idx] *= 2; in dcn20_fpu_adjust_dppclk()
2153 v->RequiredDPPCLK[vlevel][max_mpc_comb][pipe_idx] /= 2; in dcn20_fpu_adjust_dppclk()
2262 … context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel_req][context->bw_ctx.dml.vba.maxMpcComb][pipe_idx]; in dcn21_calculate_wm()
2271 …context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel_req][context->bw_ctx.dml.vba.maxMpcComb][pipe_split_… in dcn21_calculate_wm()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_mode_vba_31.c3682 myPipe.DPPCLK = v->RequiredDPPCLK[i][j][k];
4141 …v->RequiredDPPCLK[i][j][k] = v->MinDPPCLKUsingSingleDPP[k] * (1 + v->DISPCLKDPPCLKDSCCLKDownSpread…
4145 …v->RequiredDPPCLK[i][j][k] = v->MinDPPCLKUsingSingleDPP[k] * (1 + v->DISPCLKDPPCLKDSCCLKDownSpread…
4151 …v->RequiredDPPCLK[i][j][k] = v->MinDPPCLKUsingSingleDPP[k] * (1.0 + v->DISPCLKDPPCLKDSCCLKDownSpre…
4155 …v->RequiredDPPCLK[i][j][k] = v->MinDPPCLKUsingSingleDPP[k] * (1.0 + v->DISPCLKDPPCLKDSCCLKDownSpre…
4196 v->RequiredDPPCLK[i][j][NumberOfNonSplitPlaneOfMaximumBandwidth] =
4211 v->RequiredDPPCLK[i][j][k] = v->MinDPPCLKUsingSingleDPP[k]
4216 v->RequiredDPPCLK[i][j][k] = v->MinDPPCLKUsingSingleDPP[k]
4638 v->RequiredDPPCLKThisState[k] = v->RequiredDPPCLK[i][j][k];
7131 v->RequiredDPPCLK[i][j][k],
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h752 double RequiredDPPCLK[DC__VOLTAGE_STATES][2][DC__NUM_DPP__MAX]; member
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_dcn4.c458 …t.per_plane[i].dppclk_khz = (unsigned int)(core->clean_me_up.mode_lib.ms.RequiredDPPCLK[i] * 1000); in core_dcn4_mode_support()
H A Ddml2_core_shared_types.h340 double RequiredDPPCLK[DML2_MAX_PLANES]; member
H A Ddml2_core_shared.c1372 …mode_lib->ms.RequiredDPPCLK[k] = mode_lib->ms.MinDPPCLKUsingSingleDPP[k] / mode_lib->ms.NoOfDPP[k]; in dml2_core_shared_mode_support()
1373 mode_lib->ms.GlobalDPPCLK = math_max2(mode_lib->ms.GlobalDPPCLK, mode_lib->ms.RequiredDPPCLK[k]); in dml2_core_shared_mode_support()
1873 mode_lib->ms.RequiredDPPCLK, in dml2_core_shared_mode_support()
2291 myPipe->Dppclk = mode_lib->ms.RequiredDPPCLK[k]; in dml2_core_shared_mode_support()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_32.c2264 mode_lib->vba.RequiredDPPCLK[i][j][k] = mode_lib->vba.RequiredDPPCLKThisState[k]; in dml32_ModeSupportAndSystemConfigurationFull()
2550 mode_lib->vba.RequiredDPPCLKThisState[k] = mode_lib->vba.RequiredDPPCLK[i][j][k]; in dml32_ModeSupportAndSystemConfigurationFull()
2702 mode_lib->vba.RequiredDPPCLKThisState[k] = mode_lib->vba.RequiredDPPCLK[i][j][k]; in dml32_ModeSupportAndSystemConfigurationFull()
3084 mode_lib->vba.RequiredDPPCLK, in dml32_ModeSupportAndSystemConfigurationFull()
3268 ….dml32_ModeSupportAndSystemConfigurationFull.myPipe.Dppclk = mode_lib->vba.RequiredDPPCLK[i][j][k]; in dml32_ModeSupportAndSystemConfigurationFull()