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Searched refs:RequiredDISPCLKPerSurface (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h237 double *RequiredDISPCLKPerSurface);
H A Ddisplay_mode_vba_32.c2124 mode_lib->vba.RequiredDISPCLKPerSurface[i][j][k] = in dml32_ModeSupportAndSystemConfigurationFull()
2132 mode_lib->vba.RequiredDISPCLKPerSurface[i][j][k] = in dml32_ModeSupportAndSystemConfigurationFull()
2255 mode_lib->vba.RequiredDISPCLKPerSurface[i][j][k]); in dml32_ModeSupportAndSystemConfigurationFull()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h665 double RequiredDISPCLKPerSurface[DC__VOLTAGE_STATES][2][DC__NUM_DPP__MAX]; member
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_shared_types.h362 double RequiredDISPCLKPerSurface[DML2_MAX_PLANES];
361 double RequiredDISPCLKPerSurface[DML2_MAX_PLANES]; global() member
H A Ddml2_core_dcn4_calcs.c4167 double *RequiredDISPCLKPerSurface) in CalculateODMMode()
4241 *RequiredDISPCLKPerSurface = success ? DISPCLKRequired : 0; in CalculateOutputLink()
4246 DML_LOG_VERBOSE("DML::%s: RequiredDISPCLKPerSurface = %f\n", __func__, *RequiredDISPCLKPerSurface); in CalculateOutputLink()
8535 mode_lib->ms.RequiredDISPCLKPerSurface[k] = s->RequiredDISPCLKPerSurfaceNoDSC; in dml_core_mode_support()
8541 mode_lib->ms.RequiredDISPCLKPerSurface[k] = s->RequiredDISPCLKPerSurfaceDSC; in dml_core_mode_support()
8665 mode_lib->ms.RequiredDISPCLK = math_max2(mode_lib->ms.RequiredDISPCLK, mode_lib->ms.RequiredDISPCLKPerSurface[k]); in dml_core_mode_support()
4140 CalculateODMMode(unsigned int MaximumPixelsPerLinePerDSCUnit,unsigned int HActive,enum dml2_output_format_class OutFormat,enum dml2_output_encoder_class Output,enum dml2_odm_mode ODMUse,double MaxDispclk,bool DSCEnable,unsigned int TotalNumberOfActiveDPP,unsigned int TotalNumberOfActiveOPP,unsigned int MaxNumDPP,unsigned int MaxNumOPP,double PixelClock,unsigned int NumberOfDSCSlices,bool * TotalAvailablePipesSupport,unsigned int * NumberOfDPP,enum dml2_odm_mode * ODMMode,double * RequiredDISPCLKPerSurface) CalculateODMMode() argument
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core_structs.h828 dml_float_t RequiredDISPCLKPerSurface[2][__DML_NUM_PLANES__]; member
H A Ddisplay_mode_core.c127 dml_float_t *RequiredDISPCLKPerSurface);
5637 dml_float_t *RequiredDISPCLKPerSurface) in CalculateRequiredDispclk()
5675 *RequiredDISPCLKPerSurface = SurfaceRequiredDISPCLKWithoutODMCombine; in CalculateSinglePipeDPPCLKAndSCLThroughput()
5682 *RequiredDISPCLKPerSurface = SurfaceRequiredDISPCLKWithODMCombineFourToOne; in CalculateSinglePipeDPPCLKAndSCLThroughput()
5692 *RequiredDISPCLKPerSurface = SurfaceRequiredDISPCLKWithODMCombineTwoToOne; in CalculateSinglePipeDPPCLKAndSCLThroughput()
7305 mode_lib->ms.RequiredDISPCLKPerSurface[j][k] = s->RequiredDISPCLKPerSurfaceNoDSC; in dml_core_mode_support()
7311 mode_lib->ms.RequiredDISPCLKPerSurface[j][k] = s->RequiredDISPCLKPerSurfaceDSC; in dml_core_mode_support()
7401 mode_lib->ms.RequiredDISPCLK[j] = dml_max(mode_lib->ms.RequiredDISPCLK[j], mode_lib->ms.RequiredDISPCLKPerSurface[j][k]); in dml_core_mode_support()
5545 CalculateODMMode(dml_uint_t MaximumPixelsPerLinePerDSCUnit,dml_uint_t HActive,enum dml_output_encoder_class Output,enum dml_output_format_class OutputFormat,enum dml_odm_use_policy ODMUse,dml_float_t StateDispclk,dml_float_t MaxDispclk,dml_bool_t DSCEnable,dml_uint_t TotalNumberOfActiveDPP,dml_uint_t MaxNumDPP,dml_float_t PixelClock,dml_float_t DISPCLKDPPCLKDSCCLKDownSpreading,dml_float_t DISPCLKRampingMargin,dml_float_t DISPCLKDPPCLKVCOSpeed,dml_uint_t NumberOfDSCSlices,dml_bool_t * TotalAvailablePipesSupport,dml_uint_t * NumberOfDPP,enum dml_odm_mode * ODMMode,dml_float_t * RequiredDISPCLKPerSurface) CalculateODMMode() argument