Searched refs:RequiredDISPCLK (Results 1 – 9 of 9) sorted by relevance
620 double RequiredDISPCLK[][2],
2252 mode_lib->vba.RequiredDISPCLK[i][j] = mode_lib->vba.WritebackRequiredDISPCLK; in dml32_ModeSupportAndSystemConfigurationFull() 2254 mode_lib->vba.RequiredDISPCLK[i][j] = dml_max(mode_lib->vba.RequiredDISPCLK[i][j], in dml32_ModeSupportAndSystemConfigurationFull() 2271 mode_lib->vba.DISPCLK_DPPCLK_Support[i][j] = !((mode_lib->vba.RequiredDISPCLK[i][j] in dml32_ModeSupportAndSystemConfigurationFull() 2943 / mode_lib->vba.RequiredDISPCLK[i][j]; in dml32_ModeSupportAndSystemConfigurationFull() 2962 mode_lib->vba.RequiredDISPCLK[i][j]); in dml32_ModeSupportAndSystemConfigurationFull() 3100 mode_lib->vba.RequiredDISPCLK, in dml32_ModeSupportAndSystemConfigurationFull() 3284 v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.myPipe.Dispclk = mode_lib->vba.RequiredDISPCLK[i][j]; in dml32_ModeSupportAndSystemConfigurationFull() 3752 mode_lib->vba.DISPCLK = mode_lib->vba.RequiredDISPCLK[mode_lib->vba.VoltageLevel][MaximumMPCCombine]; in dml32_ModeSupportAndSystemConfigurationFull()
825 dml_float_t RequiredDISPCLK[2]; /// <brief Required DISPCLK; depends on pixel rate; odm mode etc. member1302 dml_float_t *RequiredDISPCLK; member
4711 p->RequiredDISPCLK[j], in UseMinimumDCFCLK() 6475 myPipe->Dispclk = mode_lib->ms.RequiredDISPCLK[j]; in dml_prefetch_check() 7399 mode_lib->ms.RequiredDISPCLK[j] = mode_lib->ms.WritebackRequiredDISPCLK; in dml_core_mode_support() 7401 mode_lib->ms.RequiredDISPCLK[j] = dml_max(mode_lib->ms.RequiredDISPCLK[j], mode_lib->ms.RequiredDISPCLKPerSurface[j][k]); in dml_core_mode_support() 7421 mode_lib->ms.support.DISPCLK_DPPCLK_Support[j] = !((mode_lib->ms.RequiredDISPCLK[j] > mode_lib->ms.state.dispclk_mhz) || (mode_lib->ms.GlobalDPPCLK > mode_lib->ms.state.dppclk_mhz)); in dml_core_mode_support() 7973 mode_lib->ms.cache_display_cfg.timing.HTotal[k]) / mode_lib->ms.RequiredDISPCLK[j]; in dml_core_mode_support() 7988 mode_lib->ms.cache_display_cfg.timing.HTotal[m]) / mode_lib->ms.RequiredDISPCLK[j]); in dml_core_mode_support() 8102 UseMinimumDCFCLK_params->RequiredDISPCLK = mode_lib->ms.RequiredDISPCLK; in dml_core_mode_support() [all...]
759 double RequiredDISPCLK[DC__VOLTAGE_STATES][2]; member
546 in_out->mode_support_result.global.dispclk_khz = (unsigned int)(core->clean_me_up.mode_lib.ms.RequiredDISPCLK * 1000); in core_dcn4_mode_support()
360 double RequiredDISPCLK; /// <brief Required DISPCLK; depends on pixel rate; odm mode etc.359 double RequiredDISPCLK; /// <brief Required DISPCLK; depends on pixel rate; odm mode etc. global() member
7388 calculate_tdlut_setting_params->dispclk_mhz = mode_lib->ms.RequiredDISPCLK; in dml_core_ms_prefetch_check() 7484 myPipe->Dispclk = mode_lib->ms.RequiredDISPCLK; in dml_core_ms_prefetch_check() 7620 mode_lib->ms.RequiredDISPCLK, in dml_core_ms_prefetch_check() 8663 mode_lib->ms.RequiredDISPCLK = mode_lib->ms.WritebackRequiredDISPCLK; in dml_core_mode_support() 8665 mode_lib->ms.RequiredDISPCLK = math_max2(mode_lib->ms.RequiredDISPCLK, mode_lib->ms.RequiredDISPCLKPerSurface[k]); in dml_core_mode_support() 8674 mode_lib->ms.support.DISPCLK_DPPCLK_Support = !((mode_lib->ms.RequiredDISPCLK > mode_lib->ms.max_dispclk_freq_mhz) || (mode_lib->ms.GlobalDPPCLK > mode_lib->ms.max_dppclk_freq_mhz)); in dml_core_mode_support() 9250 display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_total) / mode_lib->ms.RequiredDISPCLK; in dml_core_mode_support()
1757 pipes[pipe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.vba.RequiredDISPCLK[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn20_calculate_wm() 2268 pipes[pipe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.vba.RequiredDISPCLK[vlevel_req][context->bw_ctx.dml.vba.maxMpcComb]; in dcn21_calculate_wm()