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Searched refs:R_P0_TSSI_TRK (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8851b_rfk.c650 R_P0_TSSI_TRK + (path << 13), in _rx_dck()
660 R_P0_TSSI_TRK + (path << 13), in _rx_dck()
1974 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _dpk_tssi_pause()
2970 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0); in _tssi_enable()
2971 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_RFC, 0x3); in _tssi_enable()
2972 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT, 0xc0); in _tssi_enable()
2973 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0); in _tssi_enable()
2974 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x1); in _tssi_enable()
2982 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0); in _tssi_disable()
2983 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x1); in _tssi_disable()
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H A Drtw8852bt.c503 rtw89_phy_write32_set(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); in rtw8852bt_bb_reset()
510 rtw89_phy_write32_clr(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); in rtw8852bt_bb_reset()
529 static const u32 tssi_trk[2] = {R_P0_TSSI_TRK, R_P1_TSSI_TRK}; in rtw8852bt_tssi_cont_en()
H A Drtw8852b_rfk.c319 R_P0_TSSI_TRK + (path << 13), in _rx_dck()
331 R_P0_TSSI_TRK + (path << 13), in _rx_dck()
1814 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _dpk_tssi_pause()
3062 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, in _tssi_enable()
3065 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, in _tssi_enable()
3067 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, in _tssi_enable()
3069 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, in _tssi_enable()
3100 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_RFC, 0x1); in _tssi_disable()
3914 rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT), in rtw8852b_tssi_default_txagc()
3917 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT, 0xc0); in rtw8852b_tssi_default_txagc()
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H A Drtw8852b.c618 rtw89_phy_write32_set(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); in rtw8852b_bb_reset()
623 rtw89_phy_write32_clr(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); in rtw8852b_bb_reset()
641 static const u32 tssi_trk[2] = {R_P0_TSSI_TRK, R_P1_TSSI_TRK}; in rtw8852b_tssi_cont_en()
H A Drtw8852a.c1289 rtw89_phy_write32_set(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); in rtw8852a_bb_reset()
1294 rtw89_phy_write32_clr(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); in rtw8852a_bb_reset()
1337 rtw89_phy_write32_set(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); in rtw8852a_bbrst_for_rfk()
1340 rtw89_phy_write32_clr(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); in rtw8852a_bbrst_for_rfk()
H A Drtw8851b.c1583 rtw89_phy_write32_set(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); in rtw8851b_bb_reset()
1587 rtw89_phy_write32_clr(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); in rtw8851b_bb_reset()
1711 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN, 0x0); in rtw8851b_tssi_cont_en()
1714 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN, 0x1); in rtw8851b_tssi_cont_en()
H A Drtw8852c_rfk.c1983 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _dpk_tssi_pause()
4189 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _rx_dck()
4218 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _rx_dck()
4419 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT, in rtw8852c_tssi_default_txagc()
4424 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0); in rtw8852c_tssi_default_txagc()
4425 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x1); in rtw8852c_tssi_default_txagc()
H A Drtw8852a_rfk.c1948 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _dpk_tssi_pause()
3847 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT, in rtw8852a_tssi_default_txagc()
3852 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0); in rtw8852a_tssi_default_txagc()
3853 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x1); in rtw8852a_tssi_default_txagc()
H A Dreg.h9887 #define R_P0_TSSI_TRK 0x5818 macro