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Searched refs:RVU_PF_VFFLR_INT_ENA_W1SX (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/crypto/marvell/octeontx2/
H A Dotx2_cptpf_main.c80 RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(num_vfs)); in cptpf_enable_vf_flr_me_intrs()
94 RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(num_vfs - 64)); in cptpf_enable_vf_flr_me_intrs()
171 RVU_PF_VFFLR_INT_ENA_W1SX(reg), BIT_ULL(vf)); in cptpf_flr_wq_handler()
/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_reg.h94 #define RVU_PF_VFFLR_INT_ENA_W1SX(a) (0x940 | (a) << 3) macro
H A Drvu.c2751 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(reg), BIT_ULL(vf)); in rvu_afvf_flr_handler()
3200 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs)); in rvu_enable_afvf_intr()
3212 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64)); in rvu_enable_afvf_intr()
/linux/drivers/net/ethernet/marvell/octeontx2/nic/
H A Dotx2_pf.c139 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(reg), BIT_ULL(vf)); in otx2_flr_handler()
256 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
266 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(1), in otx2_register_flr_me_intr()