Searched refs:RVU_PF_INT_ENA_W1S (Results 1 – 2 of 2) sorted by relevance
105 #define RVU_PF_INT_ENA_W1S (0xc30) macro
441 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT_ENA_W1S, in cptpf_register_afpf_mbox_intr()