Searched refs:RVU_PF_INT_ENA_W1C (Results 1 – 2 of 2) sorted by relevance
106 #define RVU_PF_INT_ENA_W1C (0xc38) macro
417 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT_ENA_W1C, in cptpf_disable_afpf_mbox_intr()