Searched refs:RT1318_PLL1_N_7_0 (Results 1 – 2 of 2) sorted by relevance
92 #define RT1318_PLL1_N_7_0 0xf212 macro
939 regmap_update_bits(rt1318->regmap, RT1318_PLL1_N_7_0, in rt1318_set_dai_pll()1175 regmap_write(rt1318->regmap, RT1318_PLL1_N_7_0, 0x06); in rt1318_calibration_sequence()