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Searched refs:RLC_SAFE_MODE__CMD_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c3924 data = RLC_SAFE_MODE__CMD_MASK; in gfx_v12_0_set_safe_mode()
3941 WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, RLC_SAFE_MODE__CMD_MASK); in gfx_v12_0_update_perf_clk()
H A Dgfx_v11_0.c5317 data = RLC_SAFE_MODE__CMD_MASK;
5333 WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, RLC_SAFE_MODE__CMD_MASK); in gfx_v11_0_update_perf_clk()
H A Dgfx_v10_0.c7869 data = RLC_SAFE_MODE__CMD_MASK; in gfx_v10_0_set_safe_mode()
7909 data = RLC_SAFE_MODE__CMD_MASK; in gfx_v10_0_unset_safe_mode()
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h9085 #define RLC_SAFE_MODE__CMD_MASK 0x1 macro
H A Dgfx_8_0_sh_mask.h8529 #define RLC_SAFE_MODE__CMD_MASK 0x1 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h22763 #define RLC_SAFE_MODE__CMD_MASK … macro
H A Dgc_9_1_sh_mask.h24050 #define RLC_SAFE_MODE__CMD_MASK … macro
H A Dgc_9_2_1_sh_mask.h24053 #define RLC_SAFE_MODE__CMD_MASK … macro
H A Dgc_9_4_2_sh_mask.h21527 #define RLC_SAFE_MODE__CMD_MASK … macro
H A Dgc_11_5_0_sh_mask.h31583 #define RLC_SAFE_MODE__CMD_MASK … macro
H A Dgc_11_0_0_sh_mask.h36857 #define RLC_SAFE_MODE__CMD_MASK … macro
H A Dgc_12_0_0_sh_mask.h22405 #define RLC_SAFE_MODE__CMD_MASK … macro
H A Dgc_10_1_0_sh_mask.h33233 #define RLC_SAFE_MODE__CMD_MASK … macro
H A Dgc_11_0_3_sh_mask.h40229 #define RLC_SAFE_MODE__CMD_MASK … macro
H A Dgc_10_3_0_sh_mask.h33002 #define RLC_SAFE_MODE__CMD_MASK global() macro
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