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Searched refs:RLC_PERFMON_CNTL__PERFMON_STATE_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7220 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK 0x00000007L macro
H A Dgfx_7_2_sh_mask.h7741 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK 0x7 macro
H A Dgfx_8_1_sh_mask.h9143 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK 0x7 macro
H A Dgfx_8_0_sh_mask.h8585 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK 0x7 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h22474 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK … macro
H A Dgc_9_1_sh_mask.h23761 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK … macro
H A Dgc_9_2_1_sh_mask.h23764 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK … macro
H A Dgc_9_4_3_sh_mask.h25947 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK … macro
H A Dgc_9_4_2_sh_mask.h17594 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK … macro
H A Dgc_11_5_0_sh_mask.h29032 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK … macro
H A Dgc_11_0_0_sh_mask.h33248 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK … macro
H A Dgc_12_0_0_sh_mask.h18942 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK … macro
H A Dgc_10_1_0_sh_mask.h32566 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK … macro
H A Dgc_11_0_3_sh_mask.h35734 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK … macro
H A Dgc_10_3_0_sh_mask.h31097 #define RLC_PERFMON_CNTL__PERFMON_STATE_MASK … macro