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Searched refs:RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7199 #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 0x00000001 macro
H A Dgfx_7_2_sh_mask.h7732 #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 0x1 macro
H A Dgfx_8_1_sh_mask.h9098 #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 0x1 macro
H A Dgfx_8_0_sh_mask.h8546 #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 0x1 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h22770 #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT … macro
H A Dgc_9_1_sh_mask.h24057 #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h24060 #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h21534 #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h31387 #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h35829 #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h21410 #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h33240 #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h39159 #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h32161 #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT … macro