Searched refs:RK3588_DSP_IF_EDP_HDMI0_DCLK_DIV (Results 1 – 2 of 2) sorted by relevance
453 #define RK3588_DSP_IF_EDP_HDMI0_DCLK_DIV GENMASK(17, 16) macro
1815 div &= ~RK3588_DSP_IF_EDP_HDMI0_DCLK_DIV; in rk3588_set_intf_mux()1817 div |= FIELD_PREP(RK3588_DSP_IF_EDP_HDMI0_DCLK_DIV, if_dclk_div); in rk3588_set_intf_mux()1839 div &= ~RK3588_DSP_IF_EDP_HDMI0_DCLK_DIV; in rk3588_set_intf_mux()1841 div |= FIELD_PREP(RK3588_DSP_IF_EDP_HDMI0_DCLK_DIV, if_dclk_div); in rk3588_set_intf_mux()1851 div |= FIELD_PREP(RK3588_DSP_IF_EDP_HDMI0_DCLK_DIV, if_dclk_div); in rk3588_set_intf_mux()