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Searched refs:RIRB_SIZE__RIRB_SIZE_MASK (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_sh_mask.h11521 #define RIRB_SIZE__RIRB_SIZE_MASK 0x3 macro
H A Ddce_11_0_sh_mask.h12629 #define RIRB_SIZE__RIRB_SIZE_MASK 0x3 macro
H A Ddce_10_0_sh_mask.h12623 #define RIRB_SIZE__RIRB_SIZE_MASK 0x3 macro
H A Ddce_11_2_sh_mask.h13245 #define RIRB_SIZE__RIRB_SIZE_MASK 0x3 macro
H A Ddce_12_0_sh_mask.h56100 #define RIRB_SIZE__RIRB_SIZE_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h27163 #define RIRB_SIZE__RIRB_SIZE_MASK … macro
H A Ddcn_1_0_sh_mask.h973 #define RIRB_SIZE__RIRB_SIZE_MASK … macro
H A Ddcn_3_0_1_sh_mask.h241 #define RIRB_SIZE__RIRB_SIZE_MASK … macro
H A Ddcn_3_2_1_sh_mask.h47885 #define RIRB_SIZE__RIRB_SIZE_MASK … macro
H A Ddcn_3_1_5_sh_mask.h51074 #define RIRB_SIZE__RIRB_SIZE_MASK … macro
H A Ddcn_3_0_2_sh_mask.h54228 #define RIRB_SIZE__RIRB_SIZE_MASK … macro
H A Ddcn_2_0_0_sh_mask.h59172 #define RIRB_SIZE__RIRB_SIZE_MASK … macro
H A Ddcn_3_0_0_sh_mask.h62824 #define RIRB_SIZE__RIRB_SIZE_MASK … macro
H A Ddcn_3_2_0_sh_mask.h47926 #define RIRB_SIZE__RIRB_SIZE_MASK … macro