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Searched refs:RG_PE1_H_PLL_BR (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/phy/ralink/
H A Dphy-mt7621-pci.c56 #define RG_PE1_H_PLL_BR GENMASK(18, 16) macro
196 mt7621_phy_rmw(phy, RG_PE1_H_PLL_BR_REG, RG_PE1_H_PLL_BR, in mt7621_set_phy_for_ssc()
197 FIELD_PREP(RG_PE1_H_PLL_BR, 0x00)); in mt7621_set_phy_for_ssc()