Searched refs:RG_CDR_BIRLTD0_GEN3_MSK (Results 1 – 1 of 1) sorted by relevance
260 #define RG_CDR_BIRLTD0_GEN3_MSK GENMASK(4, 0) macro 1036 mtk_phy_update_field(phyd + ANA_EQ_EYE_CTRL_SIGNAL5, RG_CDR_BIRLTD0_GEN3_MSK, 0x06); in pcie_phy_instance_power_off()