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Searched refs:REG_UPDATE_SEQ_2 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_aux.c199 REG_UPDATE_SEQ_2(AUXN_IMPCAL, in submit_channel_request()
203 REG_UPDATE_SEQ_2(AUXP_IMPCAL, in submit_channel_request()
208 REG_UPDATE_SEQ_2(AUXN_IMPCAL, in submit_channel_request()
214 REG_UPDATE_SEQ_2(AUXP_IMPCAL, in submit_channel_request()
497REG_UPDATE_SEQ_2(AUX_DPHY_RX_CONTROL1, AUX_RX_TIMEOUT_LEN, length, AUX_RX_TIMEOUT_LEN_MUL, multipl… in dce_aux_configure_timeout()
/linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn10/
H A Ddcn10_hubbub.c238 REG_UPDATE_SEQ_2(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, in hubbub1_wm_change_req_wa()
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dreg_helper.h382 #define REG_UPDATE_SEQ_2(reg, f1, v1, f2, v2) \ macro