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Searched refs:REG_L (Results 1 – 25 of 31) sorted by relevance

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/linux/arch/riscv/kernel/probes/
H A Drethook_trampoline.S47 REG_L x3, PT_GP(sp)
48 REG_L x4, PT_TP(sp)
49 REG_L x5, PT_T0(sp)
50 REG_L x6, PT_T1(sp)
51 REG_L x7, PT_T2(sp)
52 REG_L x8, PT_S0(sp)
53 REG_L x9, PT_S1(sp)
54 REG_L x10, PT_A0(sp)
55 REG_L x11, PT_A1(sp)
56 REG_L x12, PT_A2(sp)
[all …]
/linux/arch/riscv/kernel/
H A Dmcount-dyn.S44 REG_L a0, ABI_A0(sp)
45 REG_L a1, ABI_A1(sp)
46 REG_L a2, ABI_A2(sp)
47 REG_L a3, ABI_A3(sp)
48 REG_L a4, ABI_A4(sp)
49 REG_L a5, ABI_A5(sp)
50 REG_L a6, ABI_A6(sp)
51 REG_L a7, ABI_A7(sp)
52 REG_L t0, ABI_T0(sp)
53 REG_L ra, ABI_RA(sp)
[all …]
H A Dmcount.S38 REG_L ra, 1*SZREG(sp)
39 REG_L s0, 0*SZREG(sp)
44 REG_L ra, FREGS_RA(sp)
45 REG_L s0, FREGS_S0(sp)
46 REG_L a0, FREGS_A0(sp)
47 REG_L a1, FREGS_A1(sp)
87 REG_L t1, 0(t0)
91 REG_L t2, 0(t3)
96 REG_L t5, 0(t3)
109 REG_L a2, -2*SZREG(s0)
[all …]
H A Dcopy-unaligned.S17 REG_L a4, 0(a1)
18 REG_L a5, SZREG(a1)
19 REG_L a6, 2*SZREG(a1)
20 REG_L a7, 3*SZREG(a1)
21 REG_L t0, 4*SZREG(a1)
22 REG_L t1, 5*SZREG(a1)
23 REG_L t2, 6*SZREG(a1)
24 REG_L t3, 7*SZREG(a1)
H A Dhibernate-asm.S29 REG_L a0, hibernate_cpu_context
49 REG_L s4, restore_pblist
50 REG_L a1, relocated_restore_code
67 REG_L a1, HIBERN_PBE_ADDR(s4)
68 REG_L a0, HIBERN_PBE_ORIG(s4)
72 REG_L s4, HIBERN_PBE_NEXT(s4)
H A Dkexec_relocate.S59 REG_L t0, 0(s0) /* t0 = *image->entry */
92 REG_L t1, (t0) /* t1 = *src_ptr */
/linux/arch/riscv/include/asm/
H A Dasm.h29 #define REG_L __REG_SEL(ld, lw) macro
98 REG_L \tmp, 0(\dst)
110 REG_L \dst, 0(\dst)
159 REG_L x6, PT_T1(sp)
160 REG_L x7, PT_T2(sp)
161 REG_L x8, PT_S0(sp)
162 REG_L x9, PT_S1(sp)
163 REG_L x10, PT_A0(sp)
164 REG_L x11, PT_A1(sp)
165 REG_L x12, PT_A2(sp)
[all …]
H A Dword-at-a-time.h65 "1: " REG_L " %0, %2\n" in load_unaligned_zeropad()
H A Dscs.h23 REG_L gp, TASK_TI_SCS_SP(tp)
/linux/arch/loongarch/power/
H A Dsuspend_asm.S36 REG_L $r1, sp, PT_R1
37 REG_L $r2, sp, PT_R2
38 REG_L $r3, sp, PT_R3
39 REG_L $r4, sp, PT_R4
40 REG_L $r21, sp, PT_R21
41 REG_L $r22, sp, PT_R22
42 REG_L $r23, sp, PT_R23
43 REG_L $r24, sp, PT_R24
44 REG_L $r25, sp, PT_R25
45 REG_L $r26, sp, PT_R26
[all …]
/linux/arch/riscv/lib/
H A Dmemcpy.S43 REG_L a4, 0(a1)
44 REG_L a5, SZREG(a1)
45 REG_L a6, 2*SZREG(a1)
46 REG_L a7, 3*SZREG(a1)
47 REG_L t0, 4*SZREG(a1)
48 REG_L t1, 5*SZREG(a1)
49 REG_L t2, 6*SZREG(a1)
50 REG_L t3, 7*SZREG(a1)
51 REG_L t4, 8*SZREG(a1)
52 REG_L t5, 9*SZREG(a1)
[all …]
H A Duaccess.S18 REG_L t0, riscv_v_usercopy_threshold
46 REG_L t0, riscv_v_usercopy_threshold
117 fixup REG_L a4, 0(a1), 10f
118 fixup REG_L a5, SZREG(a1), 10f
119 fixup REG_L a6, 2*SZREG(a1), 10f
120 fixup REG_L a7, 3*SZREG(a1), 10f
121 fixup REG_L t1, 4*SZREG(a1), 10f
122 fixup REG_L t2, 5*SZREG(a1), 10f
123 fixup REG_L t3, 6*SZREG(a1), 10f
124 fixup REG_L t4, 7*SZREG(a1), 10f
[all …]
H A Dmemmove.S132 REG_L t0, (0 * SZREG)(a1)
134 REG_L t1, (1 * SZREG)(a1)
143 REG_L t0, (2 * SZREG)(a1)
194 REG_L t1, ( 0 * SZREG)(a4)
196 REG_L t0, (-1 * SZREG)(a4)
205 REG_L t1, (-2 * SZREG)(a4)
231 REG_L t1, ( 0 * SZREG)(a1)
243 REG_L t1, (-1 * SZREG)(a4)
H A Dstrcmp.S73 REG_L t0, 0(a0)
74 REG_L t1, 0(a1)
H A Dstrncmp.S82 REG_L t0, 0(a0)
83 REG_L t1, 0(a1)
/linux/arch/mips/fw/lib/
H A Dcall_o32.S88 REG_L sp,O32_NFRAMESZ-1*SZREG(sp)
90 REG_L s0,O32_FRAMESZ-11*SZREG(sp)
91 REG_L s1,O32_FRAMESZ-10*SZREG(sp)
92 REG_L s2,O32_FRAMESZ-9*SZREG(sp)
93 REG_L s3,O32_FRAMESZ-8*SZREG(sp)
94 REG_L s4,O32_FRAMESZ-7*SZREG(sp)
95 REG_L s5,O32_FRAMESZ-6*SZREG(sp)
96 REG_L s6,O32_FRAMESZ-5*SZREG(sp)
97 REG_L s7,O32_FRAMESZ-4*SZREG(sp)
98 REG_L gp,O32_FRAMESZ-3*SZREG(sp)
[all …]
/linux/samples/ftrace/
H A Dftrace-direct-multi-modify.c39 " "REG_L" a0,0*"SZREG"(sp)\n"
40 " "REG_L" t0,1*"SZREG"(sp)\n"
41 " "REG_L" ra,2*"SZREG"(sp)\n"
55 " "REG_L" a0,0*"SZREG"(sp)\n"
56 " "REG_L" t0,1*"SZREG"(sp)\n"
57 " "REG_L" ra,2*"SZREG"(sp)\n"
H A Dftrace-direct-too.c37 " "REG_L" a0,0*"SZREG"(sp)\n"
38 " "REG_L" a1,1*"SZREG"(sp)\n"
39 " "REG_L" a2,2*"SZREG"(sp)\n"
40 " "REG_L" t0,3*"SZREG"(sp)\n"
41 " "REG_L" ra,4*"SZREG"(sp)\n"
H A Dftrace-direct-modify.c39 " "REG_L" t0,0*"SZREG"(sp)\n"
40 " "REG_L" ra,1*"SZREG"(sp)\n"
52 " "REG_L" t0,0*"SZREG"(sp)\n"
53 " "REG_L" ra,1*"SZREG"(sp)\n"
H A Dftrace-direct.c32 " "REG_L" a0,0*"SZREG"(sp)\n"
33 " "REG_L" t0,1*"SZREG"(sp)\n"
34 " "REG_L" ra,2*"SZREG"(sp)\n"
H A Dftrace-direct-multi.c34 " "REG_L" a0,0*"SZREG"(sp)\n"
35 " "REG_L" t0,1*"SZREG"(sp)\n"
36 " "REG_L" ra,2*"SZREG"(sp)\n"
/linux/tools/testing/selftests/rseq/
H A Drseq-riscv.h25 #define REG_L __REG_SEL("ld ", "lw ")
100 REG_L RSEQ_ASM_TMP_REG_1 ", %[" __rseq_str(var) "]\n" \
110 REG_L RSEQ_ASM_TMP_REG_1 ", %[" __rseq_str(var) "]\n" \
119 REG_L RSEQ_ASM_TMP_REG_1 ", %[" __rseq_str(var) "]\n"
127 REG_L RSEQ_ASM_TMP_REG_1 ", (" RSEQ_ASM_TMP_REG_1 ")\n"
163 REG_L RSEQ_ASM_TMP_REG_1 ", 0(" RSEQ_ASM_TMP_REG_1 ")\n" \
24 #define REG_L global() macro
/linux/arch/loongarch/include/asm/
H A Dasm.h55 #define REG_L ld.w macro
60 #define REG_L ld.d macro
/linux/arch/mips/include/asm/
H A Dasm.h159 #define REG_L lw macro
165 #define REG_L ld macro
/linux/arch/riscv/errata/sifive/
H A Derrata_cip_453.S12 REG_L \badaddr, PT_BADADDR(\pt_reg)

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