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Searched refs:REG_CON0 (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-pll.c21 #define REG_CON0 0 macro
243 r = readl(pll->base_addr + REG_CON0) | pll->data->en_mask; in mtk_pll_prepare()
244 writel(r, pll->base_addr + REG_CON0); in mtk_pll_prepare()
252 r = readl(pll->base_addr + REG_CON0); in mtk_pll_prepare()
254 writel(r, pll->base_addr + REG_CON0); in mtk_pll_prepare()
266 r = readl(pll->base_addr + REG_CON0); in mtk_pll_unprepare()
268 writel(r, pll->base_addr + REG_CON0); in mtk_pll_unprepare()
274 r = readl(pll->base_addr + REG_CON0) & ~pll->data->en_mask; in mtk_pll_unprepare()
275 writel(r, pll->base_addr + REG_CON0); in mtk_pll_unprepare()
350 pll->en_addr = pll->base_addr + REG_CON0; in mtk_clk_register_pll_ops()