Home
last modified time | relevance | path

Searched refs:REG_CON0 (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-pll.c20 #define REG_CON0 0 macro
232 r = readl(pll->base_addr + REG_CON0) | pll->data->en_mask; in mtk_pll_prepare()
233 writel(r, pll->base_addr + REG_CON0); in mtk_pll_prepare()
241 r = readl(pll->base_addr + REG_CON0); in mtk_pll_prepare()
243 writel(r, pll->base_addr + REG_CON0); in mtk_pll_prepare()
255 r = readl(pll->base_addr + REG_CON0); in mtk_pll_unprepare()
257 writel(r, pll->base_addr + REG_CON0); in mtk_pll_unprepare()
263 r = readl(pll->base_addr + REG_CON0) & ~pll->data->en_mask; in mtk_pll_unprepare()
264 writel(r, pll->base_addr + REG_CON0); in mtk_pll_unprepare()
310 pll->en_addr = pll->base_addr + REG_CON0; in mtk_clk_register_pll_ops()