Searched refs:REGISTER_PLL_DIV (Results 1 – 1 of 1) sorted by relevance
1529 #define REGISTER_PLL_DIV(s, ...) _REGISTER(&bcm2835_register_pll_divider, \ macro1694 [BCM2835_PLLA_CORE] = REGISTER_PLL_DIV(1704 [BCM2835_PLLA_PER] = REGISTER_PLL_DIV(1714 [BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV(1723 [BCM2835_PLLA_CCP2] = REGISTER_PLL_DIV(1751 [BCM2835_PLLB_ARM] = REGISTER_PLL_DIV(1783 [BCM2835_PLLC_CORE0] = REGISTER_PLL_DIV(1793 [BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV(1803 [BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV(1813 [BCM2835_PLLC_PER] = REGISTER_PLL_DIV([all …]