Searched refs:R9A09G057_SYS_0_PCLK (Results 1 – 3 of 3) sorted by relevance
11 #define R9A09G057_SYS_0_PCLK 0 macro
84 DEF_FIXED("sys_0_pclk", R9A09G057_SYS_0_PCLK, CLK_QEXTAL, 1, 1),
250 clocks = <&cpg CPG_CORE R9A09G057_SYS_0_PCLK>;