Searched refs:PXA1908_CLK_PLL1_D2_GATE (Results 1 – 2 of 2) sorted by relevance
30 #define PXA1908_CLK_PLL1_D2_GATE 25 macro
37 {PXA1908_CLK_PLL1_D2_GATE, "pll1_d2_gate", "pll1_d2", 0, APMU_CLK_GATE_CTRL, 29, 0, &pll1_lock},