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Searched refs:PTR_LI (Results 1 – 9 of 9) sorted by relevance

/linux/arch/loongarch/mm/
H A Dtlbex.S189 PTR_LI t0, (CSR_TLBIDX_PS >> 16) << 16
190 PTR_LI t1, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT))
195 PTR_LI t0, (CSR_TLBIDX_PS >> 16) << 16
196 PTR_LI t1, (PS_DEFAULT_SIZE << (CSR_TLBIDX_PS_SHIFT))
276 PTR_LI ra, _PAGE_PRESENT | _PAGE_WRITE
285 PTR_LI ra, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED)
324 PTR_LI t0, _PAGE_PRESENT | _PAGE_WRITE
340 PTR_LI t0, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED)
376 PTR_LI t0, (CSR_TLBIDX_PS >> 16) << 16
377 PTR_LI t1, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT))
[all …]
/linux/arch/loongarch/include/asm/
H A Dstackframe.h43 PTR_LI t1, ~TO_PHYS_MASK
47 PTR_LI t0, CSR_DMW1_INIT
62 PTR_LI \temp, CSR_DMW0_INIT # SUC, PLV0, LA32: 0x8xxx xxxx, LA64: 0x8000 xxxx xxxx xxxx
64 PTR_LI \temp, CSR_DMW1_INIT # CAC, PLV0, LA32: 0xaxxx xxxx, LA64: 0x9000 xxxx xxxx xxxx
66 PTR_LI \temp, CSR_DMW2_INIT # WUC, PLV0, LA32: unavailable, LA64: 0xa000 xxxx xxxx xxxx
68 PTR_LI \temp, CSR_DMW3_INIT # 0x0, unused
74 PTR_LI \temp1, CACHE_BASE
H A Dasm.h169 #define PTR_LI li.w macro
199 #define PTR_LI li.d macro
/linux/arch/loongarch/power/
H A Dhibernate_asm.S39 PTR_LI t3, _PAGE_SIZE
64 PTR_LI a0, 0x0
/linux/arch/loongarch/kernel/
H A Dhead.S79 PTR_LI sp, (_THREAD_SIZE - PT_SIZE)
89 PTR_LI sp, (_THREAD_SIZE - PT_SIZE)
/linux/arch/mips/include/asm/
H A Dasm.h281 #define PTR_LI li macro
306 #define PTR_LI dli macro
/linux/arch/mips/boot/compressed/
H A Dhead.S43 PTR_LI t9, KERNEL_ENTRY
/linux/arch/mips/power/
H A Dhibernate_asm.S58 PTR_LI v0, 0x0
/linux/arch/mips/kernel/
H A Dgenex.S222 PTR_LI t1, ~(_THREAD_SIZE-1)
333 PTR_LI t1, ~(_THREAD_SIZE-1)