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Searched refs:PP_OD_FEATURE_GFXCLK_BIT (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_7_ppt.c1324 PP_OD_FEATURE_GFXCLK_BIT)) in smu_v13_0_7_print_clk_levels()
1456 if (!smu_v13_0_7_is_od_feature_supported(smu, PP_OD_FEATURE_GFXCLK_BIT) && in smu_v13_0_7_print_clk_levels()
1463 if (smu_v13_0_7_is_od_feature_supported(smu, PP_OD_FEATURE_GFXCLK_BIT)) { in smu_v13_0_7_print_clk_levels()
1575 if (!smu_v13_0_7_is_od_feature_supported(smu, PP_OD_FEATURE_GFXCLK_BIT)) { in smu_v13_0_7_od_edit_dpm_table()
1600 od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_GFXCLK_BIT; in smu_v13_0_7_od_edit_dpm_table()
1616 od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_GFXCLK_BIT; in smu_v13_0_7_od_edit_dpm_table()
2189 user_od_table->OverDriveTable.FeatureCtrlMask = BIT(PP_OD_FEATURE_GFXCLK_BIT) | in smu_v13_0_7_restore_user_od_settings()
H A Dsmu_v13_0_0_ppt.c1335 PP_OD_FEATURE_GFXCLK_BIT)) in smu_v13_0_0_print_clk_levels()
1467 if (!smu_v13_0_0_is_od_feature_supported(smu, PP_OD_FEATURE_GFXCLK_BIT) && in smu_v13_0_0_print_clk_levels()
1474 if (smu_v13_0_0_is_od_feature_supported(smu, PP_OD_FEATURE_GFXCLK_BIT)) { in smu_v13_0_0_print_clk_levels()
1587 if (!smu_v13_0_0_is_od_feature_supported(smu, PP_OD_FEATURE_GFXCLK_BIT)) { in smu_v13_0_0_od_edit_dpm_table()
1612 od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_GFXCLK_BIT; in smu_v13_0_0_od_edit_dpm_table()
1628 od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_GFXCLK_BIT; in smu_v13_0_0_od_edit_dpm_table()
2205 user_od_table->OverDriveTable.FeatureCtrlMask = BIT(PP_OD_FEATURE_GFXCLK_BIT) | in smu_v13_0_0_restore_user_od_settings()
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu13_driver_if_v13_0_0.h674 #define PP_OD_FEATURE_GFXCLK_BIT 7 macro
H A Dsmu13_driver_if_v13_0_7.h688 #define PP_OD_FEATURE_GFXCLK_BIT 7 macro
H A Dsmu14_driver_if_v14_0.h685 #define PP_OD_FEATURE_GFXCLK_BIT 8 macro