Searched refs:POWER10 (Results 1 – 11 of 11) sorted by relevance
11 #define POWER10 0x80 macro168 if (pvr == POWER10) in get_mmcr2_l2l3()175 if (pvr != POWER10) in get_mmcr3_src()182 if (pvr == POWER10) in get_mmcra_thd_cmp()194 if (pvr == POWER10) in get_mmcra_bhrb_disable()
62 case POWER10: in init_ev_encodes()132 if ((pvr != POWER10) && (pvr != POWER9)) in platform_check_for_tests()501 base_pvr = POWER10; in auxv_generic_compat_pmu()
86 if (PVR_VER(mfspr(SPRN_PVR)) == POWER10) { in bhrb_filter_map_test()
62 if (PVR_VER(mfspr(SPRN_PVR)) == POWER10) { in reserved_bits_mmcra_sample_elig_mode()
39 SKIP_IF(PVR_VER(mfspr(SPRN_PVR)) != POWER10); in event_alternatives_tests_p10()
34 if (PVR_VER(mfspr(SPRN_PVR)) == POWER10) { in generic_events_valid_test()
13 and POWER10 PowerVM platforms.
115 | POWER10 |
103 POWER9, POWER10) that are supported as L2s::
177 bool "POWER10"424 MMU. From POWER10 radix is also supported by PowerVM.458 POWER10 and later CPUs support prefixed instructions, 8 byte476 POWER10 and later CPUs support pc relative addressing. Recent
7661 By default on POWER10 and above, the kernel will use