Searched refs:PORT_SCR_CTL (Results 1 – 4 of 4) sorted by relevance
19 #define PORT_SCR_CTL 0x2c macro122 regval = readl(ctrl_reg + PORT_SCR_CTL); in phy_berlin_sata_power_on()125 writel(regval, ctrl_reg + PORT_SCR_CTL); in phy_berlin_sata_power_on()
183 writel(tmp, mmio + PORT_SCR_CTL + PORT_BASE + PORT_OFFSET * i); in ahci_ceva_setup()
124 PORT_SCR_CTL = 0x2c, /* SATA phy register: SControl */ enumerator
644 [SCR_CONTROL] = PORT_SCR_CTL, in ahci_scr_offset()892 scontrol = readl(port_mmio + PORT_SCR_CTL); in ahci_power_down()894 writel(scontrol, port_mmio + PORT_SCR_CTL); in ahci_power_down()