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Searched refs:PORT_A (Results 1 – 18 of 18) sorted by relevance

/linux/samples/bpf/
H A Dtest_map_in_map_user.c19 #define PORT_A (map_fd[0]) macro
53 ret = bpf_map_update_elem(PORT_A, &port_key, &magic_result, BPF_ANY); in populate_map()
60 ret = bpf_map_update_elem(A_OF_PORT_A, &port_key, &PORT_A, BPF_ANY); in populate_map()
62 check_map_id(PORT_A, A_OF_PORT_A, port_key); in populate_map()
64 ret = bpf_map_update_elem(H_OF_PORT_A, &port_key, &PORT_A, BPF_NOEXIST); in populate_map()
66 check_map_id(PORT_A, H_OF_PORT_A, port_key); in populate_map()
/linux/drivers/gpu/drm/i915/gvt/
H A Ddisplay.c221 for (port = PORT_A; port <= PORT_C; port++) { in emulate_monitor_status_change()
281 if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) { in emulate_monitor_status_change()
287 vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) |= in emulate_monitor_status_change()
289 vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) &= in emulate_monitor_status_change()
292 vgpu_vreg_t(vgpu, BXT_PORT_PLL_ENABLE(PORT_A)) |= in emulate_monitor_status_change()
296 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) |= in emulate_monitor_status_change()
298 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) &= in emulate_monitor_status_change()
504 if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) { in emulate_monitor_status_change()
511 vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) |= DDI_INIT_DISPLAY_DETECTED; in emulate_monitor_status_change()
711 if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) { in intel_vgpu_emulate_hotplug()
H A Dhandlers.c566 case PORT_A: in bxt_vgpu_get_dp_bitrate()
964 calc_index(offset, DP_TP_CTL(PORT_A), DP_TP_CTL(PORT_B), DP_TP_CTL(PORT_E))
1185 (((port) >= PORT_A) && ((port) < I915_MAX_PORTS))
2376 MMIO_DH(DDI_BUF_CTL(PORT_A), D_ALL, NULL, ddi_buf_ctl_mmio_write); in init_generic_mmio_info()
2382 MMIO_DH(DP_TP_CTL(PORT_A), D_ALL, NULL, dp_tp_ctl_mmio_write); in init_generic_mmio_info()
2388 MMIO_DH(DP_TP_STATUS(PORT_A), D_ALL, NULL, dp_tp_status_mmio_write); in init_generic_mmio_info()
2791 MMIO_DH(BXT_PORT_PLL_ENABLE(PORT_A), D_BXT, in init_bxt_mmio_info()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_device.c263 .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C), /* DVO A/B/C */
453 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) /* DP A, SDV…
482 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SD…
507 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SD…
585 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E…
638 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E…
682 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E…
833 .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C)
931 ….__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E…
939 .__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D),
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H A Dvlv_dsi.c343 intel_de_rmw(display, MIPI_CTRL(display, PORT_A), GLK_MIPIIO_RESET_RELEASED, 0); in glk_dsi_enable_io()
383 intel_de_rmw(display, MIPI_CTRL(display, PORT_A), 0, GLK_MIPIIO_RESET_RELEASED); in glk_dsi_device_ready()
484 intel_de_rmw(display, VLV_MIPI_PORT_CTRL(PORT_A), 0, LP_OUTPUT_HOLD); in vlv_dsi_device_ready()
543 intel_de_rmw(display, MIPI_CTRL(display, PORT_A), GLK_MIPIIO_RESET_RELEASED, 0); in glk_dsi_disable_mipi_io()
579 BXT_MIPI_PORT_CTRL(port) : VLV_MIPI_PORT_CTRL(PORT_A); in vlv_dsi_clear_device_ready()
597 if ((display->platform.broxton || port == PORT_A) && in vlv_dsi_clear_device_ready()
643 if (intel_dsi->ports == (BIT(PORT_A) | BIT(PORT_C))) { in intel_dsi_port_enable()
997 *pipe = port == PORT_A ? PIPE_A : PIPE_B; in intel_dsi_get_hw_state()
1331 tmp = intel_de_read(display, MIPI_CTRL(display, PORT_A)); in intel_dsi_prepare()
1333 intel_de_write(display, MIPI_CTRL(display, PORT_A), in intel_dsi_prepare()
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H A Dintel_display_limits.h95 PORT_A = 0, enumerator
H A Dintel_bios.c1662 panel->vbt.dsi.bl_ports = BIT(PORT_A); in parse_dsi_backlight_ports()
1669 panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc); in parse_dsi_backlight_ports()
1678 panel->vbt.dsi.cabc_ports = BIT(PORT_A); in parse_dsi_backlight_ports()
1686 BIT(PORT_A) | BIT(port_bc); in parse_dsi_backlight_ports()
2323 for (port = PORT_A; port < n_ports; port++) { in __dvo_port_to_port()
2344 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, in dvo_port_to_port()
2359 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, in dvo_port_to_port()
2370 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, in dvo_port_to_port()
2379 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, in dvo_port_to_port()
2417 return PORT_A; in dsi_dvo_port_to_port()
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H A Dicl_dsi.c108 if (port == PORT_A) in dsi_port_to_transcoder()
240 port = PORT_A; in icl_dsi_frame_update()
410 port == PORT_A ? in get_dsi_io_power_domains()
1418 port == PORT_A ? in gen11_dsi_disable_io_power()
1556 if (intel_dsi->ports == (BIT(PORT_B) | BIT(PORT_A))) in gen11_dsi_get_cmd_mode_config()
2008 intel_dsi->ports = BIT(PORT_A) | BIT(PORT_B); in icl_dsi_init()
H A Dvlv_dsi_regs.h16 #define _MIPI_PORT(port, a, c) (((port) == PORT_A) ? a : c) /* ports A and C only */
H A Dintel_dvo.c85 .port = PORT_A,
H A Dintel_display_irq.c1335 PORT_A : PORT_B; in gen11_dsi_te_interrupt_handler()
1336 dsi_trans = (port == PORT_A) ? TRANSCODER_DSI_0 : TRANSCODER_DSI_1; in gen11_dsi_te_interrupt_handler()
1367 port = (te_trigger & DSI1_TE) ? PORT_B : PORT_A; in gen11_dsi_te_interrupt_handler()
1762 port = PORT_A; in gen11_dsi_configure_te()
H A Dintel_dp.c518 encoder->port != PORT_A); in intel_dp_has_joiner()
1630 if (DISPLAY_VER(display) == 11 && encoder->port != PORT_A && in intel_dp_source_supports_fec()
2894 if (DISPLAY_VER(display) < 12 && port == PORT_A) in intel_dp_port_has_audio()
6643 if (DISPLAY_VER(display) < 9 && port == PORT_A) in _intel_dp_is_port_edp()
6669 if (port == PORT_A) in intel_dp_has_gamut_metadata_dip()
6689 if (!display->platform.g4x && port != PORT_A) in intel_dp_add_properties()
H A Dintel_dsi_vbt.c98 return PORT_A; in intel_dsi_seq_port_to_port()
H A Dintel_hdcp.c463 case PORT_A: in intel_hdcp_get_repeater_ctl()
2283 case PORT_A: in intel_get_hdcp_ddi_index()
H A Dintel_display.c1867 return PHY_A + port - PORT_A; in intel_port_to_phy()
3901 for_each_port_masked(port, BIT(PORT_A) | BIT(PORT_C)) { in bxt_get_dsi_transcoder_state()
3902 if (port == PORT_A) in bxt_get_dsi_transcoder_state()
7819 if (intel_de_read(display, DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) in intel_ddi_crt_present()
7866 g4x_dp_init(display, DP_A, PORT_A); in intel_setup_outputs()
H A Dintel_psr.c1234 return pipe == PIPE_A && port == PORT_A; in dc3co_is_pipe_port_compatible()
3723 if (DISPLAY_VER(display) < 12 && dig_port->base.port != PORT_A) { in intel_psr_init()
H A Dintel_dp_mst.c1837 if (DISPLAY_VER(display) < 12 && port == PORT_A) in intel_dp_mst_encoder_init()
/linux/drivers/staging/media/tegra-video/
H A Dtegra210.c1016 val = ((portno & 1) == PORT_A) ? in tegra210_csi_port_start_streaming()
1109 val = ((portno & 1) == PORT_A) ? in tegra210_csi_port_stop_streaming()