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Searched refs:POR (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/phy/qualcomm/
H A Dphy-qcom-m31-eusb2.c25 #define POR BIT(1) macro
84 M31_EUSB_PHY_INIT_CFG(USB_PHY_UTMI_CTRL5, POR, 1),
103 M31_EUSB_PHY_INIT_CFG(USB_PHY_UTMI_CTRL5, POR, 0),
H A Dphy-qcom-snps-femto-v2.c31 #define POR BIT(1) macro
421 POR, POR); in qcom_snps_hsphy_init()
459 POR, 0); in qcom_snps_hsphy_init()
/linux/drivers/phy/
H A Dphy-snps-eusb2.c55 #define POR BIT(1) macro
375 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_UTMI_CTRL5, POR, POR); in qcom_snps_eusb2_hsphy_init()
435 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_UTMI_CTRL5, POR, 0); in qcom_snps_eusb2_hsphy_init()
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx23-olinuxino.dts110 startup-delay-us = <300>; /* LAN9215 requires a POR of 200us minimum */
/linux/drivers/soc/fsl/
H A DKconfig16 enabling, power-onreset(POR) configuration monitoring, alternate
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mq-tqma8mq.dtsi281 /* Attention: wdog reset forcing POR needs baseboard support */
H A Dimx8mn-tqma8mqnl.dtsi252 * wdog reset is routed to PMIC, PMIC must be preconfigured to force POR
H A Dimx8mm-tqma8mqml.dtsi263 * wdog reset is routed to PMIC, PMIC must be preconfigured to force POR
/linux/Documentation/translations/sp_SP/process/
H A Dkernel-docs.rst25 POR FAVOR, si conoce algún documento que no figura aquí, o si escribe un
H A Dcoding-style.rst632 posiblemente POR QUÉ hace esto.
/linux/Documentation/ABI/stable/
H A Dsysfs-driver-firmware-zynqmp42 Register is reset only by a POR reset.
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-pinephone-pro.dts167 * POR circuit.