Searched refs:PLL_V0PLL (Results 1 – 7 of 7) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| H A D | rockchip,rk3506-cru.h | 12 #define PLL_V0PLL 1 macro
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| H A D | rockchip,rk3588-cru.h | 18 #define PLL_V0PLL 3 macro
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3588-coolpi-cm5-genbook.dts | 425 assigned-clock-parents = <&cru PLL_V0PLL>;
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| H A D | rk3588-evb2-v10.dts | 959 assigned-clock-parents = <&cru PLL_V0PLL>;
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| H A D | rk3588s-evb1-v10.dts | 1219 assigned-clock-parents = <&cru PLL_V0PLL>;
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| /linux/drivers/clk/rockchip/ |
| H A D | clk-rk3506.c | 158 [v0pll] = PLL(pll_rk3328, PLL_V0PLL, "v0pll", mux_pll_p,
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| H A D | clk-rk3588.c | 658 [v0pll] = PLL(pll_rk3588, PLL_V0PLL, "v0pll", mux_pll_p,
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