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Searched refs:PLL_SEC_RST (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/clk/
H A Dclk-rp1.c247 #define PLL_SEC_RST BIT(16) macro
702 return !(clockman_read(clockman, data->ctrl_reg) & PLL_SEC_RST); in rp1_pll_divider_is_on()
715 clockman_read(clockman, data->ctrl_reg) & ~PLL_SEC_RST); in rp1_pll_divider_on()
729 clockman_read(clockman, data->ctrl_reg) | PLL_SEC_RST); in rp1_pll_divider_off()
751 sec |= PLL_SEC_RST; in rp1_pll_divider_set_rate()
757 sec &= ~PLL_SEC_RST; in rp1_pll_divider_set_rate()