Searched refs:PLL_CTL0_MODE (Results 1 – 1 of 1) sorted by relevance
46 #define PLL_CTL0_MODE GENMASK(19, 18) macro202 reg_ctl[0] |= FIELD_PREP(PLL_CTL0_MODE, PLL_MODE_INT); in ma35d1_clk_pll_set_rate()205 reg_ctl[0] |= FIELD_PREP(PLL_CTL0_MODE, PLL_MODE_FRAC); in ma35d1_clk_pll_set_rate()208 reg_ctl[0] |= FIELD_PREP(PLL_CTL0_MODE, PLL_MODE_SS) | in ma35d1_clk_pll_set_rate()