Searched refs:PLLU_BASE (Results 1 – 2 of 2) sorted by relevance
74 #define PLLU_BASE 0xc0 macro2302 .base_reg = PLLU_BASE,2916 reg = readl_relaxed(clk_base + PLLU_BASE); in tegra210_enable_pllu()2921 writel(reg, clk_base + PLLU_BASE); in tegra210_enable_pllu()2924 writel(reg, clk_base + PLLU_BASE); in tegra210_enable_pllu()2932 ret = tegra210_wait_for_mask(&pllu, PLLU_BASE, PLL_BASE_LOCK); in tegra210_enable_pllu()2948 reg = readl_relaxed(clk_base + PLLU_BASE); in tegra210_init_pllu()2958 reg = readl_relaxed(clk_base + PLLU_BASE); in tegra210_init_pllu()2960 writel(reg, clk_base + PLLU_BASE); in tegra210_init_pllu()2980 reg = readl_relaxed(clk_base + PLLU_BASE); in tegra210_init_pllu()[all …]
52 #define PLLU_BASE 0xc0 macro735 .base_reg = PLLU_BASE,1155 CLK_SET_RATE_PARENT, clk_base + PLLU_BASE, in tegra124_pll_init()